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Features
ARM7TDMI(R) ARM(R) Thumb(R) Processor Core Two 16-bit Fixed-point OakDSPCore(R) Cores 256 x 32-bit Boot ROM 88K Bytes of Integrated Fast RAM for Each DSP Flexible External Bus Interface with Programmable Chip Selects Dual Codec Interface Multi-level Priority, Individually Maskable, Vectored Interrupt Controller Three 16-bit Timers/Counters Additional Watchdog Timer Two USARTs with FIFO and Modem Control Lines Industry -standard Serial Peripheral Interface (SPI) Up to 24 General-purpose I/O Pins On-chip SDRAM Controller for Embedded ARM7TDMI and OakDSPCore JTAG Debug Interface Software Development Tools Available for ARM7TDMI and OakDSPCore Supported by a Wide Range of Ready-to-use Application Software, including Multitasking Operating System, Networking, Modems and Voice Processing Functions * Available in 160-lead PQFP Package * 2.5V Power Supply for the core and the PLL Pins, 3.3V Power Supply for Other I/O Pins
* * * * * * * * * * * * * * * *
Smart Internet Appliance Processor (SIAPTM) AT75C320 Preliminary
Description
The Atmel AT75C320 Smart Internet Appliance Processor (SIAPTM) is a high-performance processor specially designed for Internet appliance applications, such as Internet telephony (Voice-over-Internet Protocol - VoIP). The AT75C320 is a derivative version of the AT75C310. The device is built around an ARM7TDMI microcontroller core running at 40 MIPS with two DSP co-processors running at 60 MIPS each - all three processors delivering unmatched performance for low power consumption. In a typical standalone VoIP phone, one DSP handles the voice processing functions (voice compression, acoustic echo cancellation, etc.), while the other one deals with the telephony functions (dialing, line echo cancellation, callerID detection, high-speed modem, etc.). In such an application, the power of the ARM7TDMI allows it to run the VoIP protocol stack as well as all the system control tasks. Atmel provides the AT75C320 with three levels of software modules: * * * a special port of the Linux(R) kernel as the proposed operating system; a comprehensive set of tunable DSP algorithms for modems and voice processing, specially tailored to be run by the DSP subsystems; a broad range of application level software modules such as H.323 telephony or POP-3/SMTP e-mail services.
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AT75C320 Pin Configuration
Table 1. AT75C320 Pinout in PQFP160 Package
Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 PQFP160 NC NC D10 D11 NCE3 D12 D13 SRXB NWE0 GND VDD3V3 D14 D15 NC NWE1 NC VDD2V5 GND VDD2V5 XTALIN XTALOUT GND PLL_GND XREF240 PLL_VDD2V5 GND VDD2V5 RXDA TXDA NRTSA NCTSA NDCDB NDTRA NDSRA GND VDD3V3 NDCDA TXDB RXDB PB7 Pin 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 PQFP160 NC PB6/NWDOVF PB5/NRIA PB4 PB3/NCTSA DBW32 GND VDD3V3 RESET IRQ0 PB2/TIOB1 PB9 PB1/TIOA1 PB8 PB0/TCLK1 VDD2V5 GND TST NTRST TCK TMS TDI TDO PA0/OakAIN0 PA1/OakAIN1 PA2/OakAOUT0 PA3/OakAOUT1 PA19/ACLK PA4/OakBIN0 GND VDD3V3 PA5/OakBIN1 PA6/OakBOUT0 PA7/OakBOUT1 PA8/TCLK0 PA9/TIOA0 PA10/TIOB0 PA11/SCKA NC NC Pin 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 PQFP160 PA12/NPCS1 VDD2V5 GND A0 A1 A2 A3 VDD3V3 BO208 NWR NWAIT NREQ FIQ NGNT SCLKA FSA STXA SRXA A4 A5 A6 A7 NPCSS SPCK MISO MOSI VDD3V3 GND VDD2V5 GND A8 A9 A10 A11 A12 VDD3V3 GND A13 A14 A15 Pin 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 PQFP160 NC NC A16 A17 A18 A19 A20 A21 VDD2V5 GND VDD3V3 D0 DQM0 D1 DQM1 D2 D3 D4 RAS CAS CS0 CS1 DCK WE D5 STXB FSB SCLKB D6 D7 GND VDD3V3 NCE0 D8 D9 NSOE GND GND NC NC
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AT75C320 Pin Description
Table 2. AT75C320 Pin Description
Block PQFP Pin Name A[21:0] D[15:0] Common Bus NREQ NGNT DCK DQM[1:0] Synchronous Dynamic Memory Controller CS0 CS1 WE RAS CAS NCE0, NCE3 NWE[1:0] Static Memory Controller NSOE NWR NWAIT I/O Port A I/O Port B DSP Subsystem A OakAOUT[1:0] OakBIN[1:0] DSP Subsystem B OakBOUT[1:0] TCLK0 Timer/Counter 0 TIOA0 TIOB0 TCLK1 Timer/Counter 1 TIOA1 TIOB1 Watchdog NWDOVF MISO Serial Peripheral Interface MOSI SPCK NPCSS O I I/O I/O I I/O I/O O I/O I/O I/O I/O OakDSPCore B User Outputs Timer 0 External Clock Timer 0 Signal A Timer 0 Signal B Timer 1 External Clock Timer 1 Signal A Timer 1 Signal B Watchdog Overflow Master In/Slave Out Master Out/Slave In Serial Clock Chip Select/Slave Select O I OakDSPCore A User Outputs OakDSPCore B User Inputs PA[12:0], PA19 PB[9:0] OakAIN[1:0] I O O O O O O O O O O O O I I/O I/O I Bus Request Bus Grant SDRAM Clock Memory Data Byte Masks SDRAM Chip Select SDRAM Chip Select SDRAM Write Enable Row Address Select Column Address Select Chip Selects Byte Select/Write Enable Output Enable Memory Block Write Enable Enable Wait States General Purpose I/O Lines. Multiplexed with Peripheral I/Os General Purpose I/O Lines. Multiplexed with Peripheral I/Os OakDSPCore A User Inputs Type O I/O Function Address Bus Data Bus
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Table 2. AT75C320 Pin Description (Continued)
Block PQFP Pin Name RXDA TXDA NRTSA NCTSA USART A NDTRA NDSRA NDCDA NRIA SCKA RXDB USART B TXDB NTRST TCK JTAG Interface TMS TDI TDO SCLKA FAS Codec Interface A STXA SRXA SCLKB FSB Codec Interface B STXB SRXB RESET FIQ/LOWP IRQ0 XREF Miscellaneous XTALIN XTALOUT TST DBW32 BO206 O I I I I I I O I I I Transmit Data to Codec Receive Data from Codec Master Reset Fast Interrupt/Low Power External Interrupt request External 96 MHz PLL Reference External Crystal Input External Crystal Output Test Mode External Data Width for CS0 Package Size Option O I I/O I/O Transmit Data to Codec Receive Data from Codec Codec Serial Clock Frame Pulse O I I I I O I/O I/O Transmit Serial Data TAP Reset TAP Clock JTAG Test Mode Select JTAG Test Data Input JTAG Test Data Output Codec Serial Clock Frame Pulse Type I O O I O I I I I/O I Function Receive Serial Data Transmit Serial Data Request to Send Clear To Send Data Terminal Ready Data Set Ready Data Carrier Detect Ring Indicator Serial Clock Receive Serial Data
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Block Diagram
Figure 1. AT75C320 Block Diagram
OakDSPCore A DSP Subsystem OakDSPCore B DSP Subsystem JTAG
ASB
Reset
Clocks
SDRAM Controller External Bus Interface
Embedded ICE
SRAM Controller
ARM7TDMI Core
Boot ROM
Peripheral Data Controller
AMBA
TM
Bridge
SPI IRQ Controller USART A PIO A
USART B
PIO B Timer/Counter 0 Timer/Counter 1 Watchdog Timer Timer/Counter 2
APB
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Figure 2. DSP Subsystem Block Diagram
Oak Program Bus
2K x 16 X-RAM Codec Interface 2K x 16 Y-RAM
Oak Data Bus
24K x 16 Program RAM
OakDSPCore
16K x 16 Generalpurpose RAM
On-chip Emulation Module
256 x 16 Dual-port Mailbox
Bus Interface Unit
DSP Subsystem
ASB
Application Example
Figure 3. Standalone Internet Telephone
Keyboard Screen
Line
Line Interface
Data Codec
V.34 Modem
DSP Subsystem
SDRAM Controller VolP Protocol Stack
SDRAM
Speaker Microphone Handset
Speaker Phone Interface
External Bus Interface
Voice Codec Voice Processing
SRAM Controller ARM7TDMI Core
Analog Front-End
DSP Subsystem
Flash
AT75C320
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Functional Description
ARM7TDMI Core
The ARM7TDMI is a three-stage pipeline, 32-bit RISC processor. The processor architecture is Von Neumann load/store architecture which is characterized by a single data and address bus for instructions and data. The CPU has two instruction sets: the ARM and the Thumb instruction set. The ARM instruction set has 32-bit wide instructions and provides maximum performance. Thumb instructions are 16 bits wide and give maximum code density. Instructions operate on 8-, 16- and 32-bit data types. The CPU has seven operating modes. Each operating mode has dedicated banked registers for fast exception handling. The processor has a total of 37 32-bit registers, including six status registers.
DSP Subsystem
The AT75C320 has two identical DSP subsystems. Each DSP subsystem is composed of: * * * * * * * An OakDSPCore running at 60 MIPS 2K x 16 of X-RAM 2K x 16 of Y-RAM 16K x 16 of general purpose data RAM 24K x 16 of loadable program RAM One 256 x 16 dual-port mailbox One codec interface
The DSP subsystem is fully autonomous. The local X- and Y-RAM allow it to reach its maximum processing rate, and a local large data RAM enables complex DSP algorithms to be implemented. The large size of the loadable program RAM permits the use of functions as complex as a V.34 modem or a low bit-rate vocoder. During boot time, the ARM7TDMI core has the ability to maintain the OakDSPCore in reset state and to upload DSP boot code. When the OakDSPCore reverts to an active state, this boot code can be used to get the complete DSP application code from the ARM7TDMI through the mailbox. When the OakDSPCore is running, the dual-port mailbox is used as the communication channel between the ARM7TDMI and the OakDSPCore. One programmable codec interface is directly connected to each OakDSPCore. It allows the connection of most industrial voice, multimedia or data codecs.
Boot ROM Boot Code Operation
The ARM7TDMI has the ability to boot either from an external memory or from the onchip 256 x 32-bit boot ROM. The internal boot sequence allows programming of the ARM7TDMI program RAM through a serial port. When the download is complete, a branch is executed to the downloaded code.
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EBI: External Bus Interface
The EBI generates the signals that control access to external memory or memory-mapped peripherals. The EBI is fully programmable and can address up to 64M bytes. The interface to external devices is composed of common address and data buses and separate control lines to allow the connection of static or dynamic devices. The main features are: * * * * * * * * * * External memory mapping Up to four chip select lines 32- or 16-bit data bus Byte write or byte select lines Remap of boot memory Support for both static and dynamic memories Two different read protocols for static memories Support for early read/early write for dynamic memories Programmable wait state generation Programmable data float time
AIC: Advanced Interrupt Controller
The AT75C320 has an 8-level priority interrupt controller. The interrupt controller outputs are connected to the NFIQ (fast interrupt request) and the NIRQ (normal interrupt request) of the ARM7TDMI core. The processor's NFIQ can only be asserted by the external fast interrupt request input (FIQ). The NIRQ line can be asserted by the interrupts generated by the on-chip peripherals or by the external interrupt request line IRQ0. An 8-level priority encoder allows the application to define the priority between the different interrupt sources. Interrupt sources are programmed to be level sensitive or edge sensitive. External sources can be programmed to be positive- or negative-edge triggered, or low- or high-level sensitive.
PIO: Parallel I/O Controller
The AT75C320 has 24 programmable I/O lines. They can all be programmed as inputs or outputs. To optimize the use of available package pins, most of them are multiplexed with external signals of on-chip peripherals. The PIO lines are controlled by two separate and identical PIO controllers called PIOA and PIOB. The PIO controllers enable the generation of an interrupt on input change and insertion of a simple glitch filter on each PIO line. Some I/O lines have enough drive capability to power a LED.
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USART: Universal Synchronous/ Asynchronous Receiver/ Transmitter
The AT75C320 provides two identical full-duplex, universal synchronous/asynchronous receiver/transmitters that interface to the APB and are connected to the peripheral data controller. The main features are: * * * * * * * * * Programmable baud rate generator Parity, framing and overrun error detection Line break generation and detection Automatic echo, local loopback and remote loopback Multi-drop mode: address detection and generation Interrupt generation Dedicated peripheral data controller channels 6-, 7-, 8- and 9-bit character length In addition to the Tx and Rx signals, the USART A provides several modem control lines.
SPI: Serial Peripheral Interface
The AT75C320 includes an SPI that provides communication with external devices in master or slave mode. The SPI has one external chip select that can be connected to two devices. The data length is programmable from 8- to 16-bit. The AT75C320 features three identical 16-bit timer/counters. They can be independently programmed to perform a wide range of functions, including frequency measurement, event counting, interval measurement, pulse generation, delay timing and pulse width modulation. The triple timer/counter block has three external clock inputs, five internal clock inputs and two multi-purpose signals that can be configured by the user. Each timer drives an internal interrupt signal that can be programmed to generate processor interrupts via the advanced interrupt controller.
Timer/Counter
Watchdog Timer Special Functions
The AT75C320 has an internal watchdog timer that can be used to prevent system lock-up if the software becomes trapped in a deadlock. The AT75C320 provides registers that implement the following special functions: * * Chip identification Reset status
Application Software
The AT75C320 is supported by a comprehensive range of software modules. As a result of the widespread use of the ARM7TDMI and the OakDSPCore, a wide range is available, either directly from Atmel or from third parties. The application software modules are in three categories: OS level, DSP level and application level.
OS Level
The AT75C320 is supplied with a customized port of the Linux kernel. It features device drivers for all the on-chip peripherals, including the DSP subsystems, and supports virtual file system usage. It also supports the native TCP/IP facilities that have made Linux a success in Internet applications. This kernel is available in source code under the terms of the Gnu Public License. Many other operating systems exist for the ARM7TDMI core.
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DSP Level
A wide range of DSP functions are available for the OakDSPCore. Among others, Atmel supplies modules for a V.34 modem, G723.1 and G729A voice codecs, silence compression and echo cancellation. A rich software toolkit is available with support for popular communication protocols (H.323, POP-3/SMTP, etc.), connection processes, multimedia applications, full-feature telephony and audio software suites.
Application Level
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Development Tools Packaging
Both the ARM7TDMI and the OakDSPCore are industry-standard cores. They are supported by a comprehensive range of state-of-the-art development tools, including assemblers, C-compilers, source level debuggers and hardware emulators. The AT75C320 is supplied in a 160-lead PQFP package. This provides the best compromise between external connectivity and cost.
Figure 4. PQFP Package Drawing
For package data, see Table 3, Table 4 and Table 5 below.
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Package Data
Table 3. Common Dimensions (mm)
Symbol c c1 L L1 R2 R1 S Tolerances of Form and Position aaa bbb ccc 0.25 0.20 0.10 0.13 0.13 0.4 Min 0.11 0.11 0.65 0.88 1.95 REF 0.3 Nom Max 0.23 0.17 1.03
Table 4. Dimensions Specific to 160-lead Package (mm)
A Max 4.07 A1 Min 0.25 Min 3.17 A2 Nom 3.42 Max 3.67 Min 0.22 b Max 0.38 Min 0.22 b1 Nom 0.3 Max 0.33 D BSC 31.90 D1 BSC 28.00 E BSC 31.90 E1 BSC 28.00 E BSC 0.65 ddd BSC 0.12
Table 5. 160-lead PQFP Package Electrical Characteristics
Body Size 28 x 28 R (m) Min 42 Max 64 Min 1.2 Cs (pF) Max 1.6 Min 0.5 Cm (pF) Max 0.7 Min 5.6 Ls (nH) Max 8.6 Min 3.5 Lm (nH) Max 5.7
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(c) Atmel Corporation 2001. Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company's standard warranty which is detailed in Atmel's Terms and Conditions located on the Company's web site. The Company assumes no responsibility for any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without notice, and does not make any commitment to update the information contained herein. No licenses to patents or other intellectual property of Atmel are granted by the Company in connection with the sale of Atmel products, expressly or by implication. Atmel's products are not authorized for use as critical components in life support devices or systems. ATMEL (R) is the registered trademark of Atmel Corporation; SIAP is the trademark of Atmel Corporation. ARM (R), ARM7TDMI and Thumb (R) are trademarks of ARM, Ltd.; OakDSPCore (R) is the trademark of DSP Group, Inc.; Linux (R) is the trademark of Linus Torvalds. Other terms and product names may be the trademark of others.
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1769A-07/01

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